The present invention relates to a semiconductor device and a method of manufacturing the same.
As a power semiconductor device, for example, a trench gate type vertical MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is known in the related art.
When noise occurs in the trench gate type vertical MOSFET, the noise passes through junction capacitance of a pn junction formed between a drift region and a base region. However, when the frequency of the noise is low, the impedance of the junction capacitance is large. As a result, there is a problem that that the noise is difficult to pass through the junction capacitance.
As semiconductor devices for solving the problem, a semiconductor device described in Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2009-260271) and a semiconductor device described in Patent Document 2 (U.S. Pat. No. 5,998,833) are proposed.
A semiconductor substrate of the semiconductor device described in Japanese Unexamined Patent Application Publication No. 2009-260271 has a trench MOS region where a trench gate type vertical MOSFET is formed and a capacitance forming region. In the capacitance forming region, the semiconductor substrate has a trench formed from a first surface to a second surface in a drift region, an insulating film formed on a surface of the trench, and a conductive layer formed over the insulating film. The conductive layer has a source potential. Therefore, a source-drain capacitance is formed between the conductive layer and the drift region.
The semiconductor device described in U.S. Pat. No. 5,998,833 has a gate electrode which faces a part of a base region sandwiched between a source region and a drift region and is insulated from the part of the base region and a conductive layer which faces the drift region and is insulated from the drift region in a semiconductor substrate. The gate electrode and the conductive layer are formed in a trench formed from a first surface to a second surface of the semiconductor substrate. The conductive layer has a source potential. The conductive layer is arranged closer to the second surface than the gate electrode. Therefore, a source-drain capacitance is formed between the conductive layer and the drift region.